[IISE Faculty List] Postdoc/Research Fellow Position in GPU-Accelerated Optimization/Graph Algorithms (please pass to your qualified PhD students)

Sun Jan 12 22:47:22 EST 2025

Please forward to your qualified PhD student. Thanks!

Post Doctoral Position in GPU-Accelerated Optimization/Graph Algorithms
Job posting link: https://nam12.safelinks.protection.outlook.com/?url=https%3A%2F%2Fcareers.sutd.edu.sg%2Fjob-invite%2F1916%2F&data=05%7C02%7CIEFac.list%40mailman.clemson.edu%7C821175ce565949b1c4cf08dd338501a2%7C0c9bf8f6ccad4b87818d49026938aa97%7C0%7C0%7C638723368552360656%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=UV5Jg%2BODQt5iIPxlKQBxssqhN8XrFBZK%2F%2Fg36hkid50%3D&reserved=0

Engineering Systems and Design, Singapore University of Technology and Design
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Graphics Processing Units (GPUs) have become pervasive computing devices. They are massively parallel machines that provide a cost-effective solution for high-performance computing applications. Their application in discrete optimization and graph algorithms has not received much attention, however. Our research group in ESD at Singapore University of Technology and Design (and ISE at University of Illinois, Urbana-Champaign) have been pursuing novel research in parallel algorithms with strong theoretical underpinnings, for the Compute Unified Device Architecture (CUDA) enabled NVIDIA GPUs, to solve large-scale Assignment Problems and Graph Algorithms. We also contribute to making AI faster. (See below for past research.)

Job Responsibilities
Postdoctoral Fellows will have an opportunity to perform impactful research in parallel algorithms for (discrete) optimization and graph problems. Publishing highest quality research papers in top-ranked journals (and conferences) is to be expected.

Minimum and Preferred Qualifications
A doctorate in Industrial and Systems Engineering, Operations Research, Computer Engineering, Computer Science, or closely related discipline is required at the start of the appointment. Prior publication credentials will be evaluated. Knowledge of CUDA (and GPU hardware basics) will be a plus but not mandatory. Should have a desire to make break-through contributions, such as https://nam12.safelinks.protection.outlook.com/?url=https%3A%2F%2Fdeveloper.nvidia.com%2Fblog%2Faccelerate-large-linear-programming-problems-with-nvidia-cuopt%2F&data=05%7C02%7CIEFac.list%40mailman.clemson.edu%7C821175ce565949b1c4cf08dd338501a2%7C0c9bf8f6ccad4b87818d49026938aa97%7C0%7C0%7C638723368552407376%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=EcGzU3TRXym1%2FU5ZCCyOScL%2FS0OwTKoEHi1D%2B4Y6OMo%3D&reserved=0

Application Requirements
Interested applicants should submit: (1) a brief letter/email of interest; (2) curriculum vitae; (3) names and contact information for three references; and (4) research plan/proposal (up to two pages, not including references) to Prof. Rakesh Nagi rakesh_nagi at sutd.edu.sg<mailto:rakesh_nagi at sutd.edu.sg>. SUTD will perform a background check before the employment can be finalized.

Details
Starting date as early as January 2025! Duration of 1+ years.
Deadline: Jan 31, 2025 (or until position is filled).
Successful candidates can look forward to competitive remuneration packages.

Past Research

  1.  Kawtikwar, S. and Nagi, R. "HyLAC: Hybrid Linear Assignment solver in CUDA," Journal of Parallel and Distributed Computing, May 2024, Vol. 187, pp. 104838. (Link<https://nam12.safelinks.protection.outlook.com/?url=https%3A%2F%2Fdoi.org%2F10.1016%2Fj.jpdc.2024.104838&data=05%7C02%7CIEFac.list%40mailman.clemson.edu%7C821175ce565949b1c4cf08dd338501a2%7C0c9bf8f6ccad4b87818d49026938aa97%7C0%7C0%7C638723368552421156%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=iUmVS%2F486%2BS382RAkZWCLIgj8nVNuDaQ2K7J4FBOV2E%3D&reserved=0>) [Reigning fastest LAP solver]
  2.  Mahajan, M. and Nagi, R. "GPU-Accelerated Transportation Simplex Algorithm," Journal of Parallel and Distributed Computing, February 2024, Vol. 184, pp. 104790. (Link<https://nam12.safelinks.protection.outlook.com/?url=https%3A%2F%2Fdoi.org%2F10.1016%2Fj.jpdc.2023.104790&data=05%7C02%7CIEFac.list%40mailman.clemson.edu%7C821175ce565949b1c4cf08dd338501a2%7C0c9bf8f6ccad4b87818d49026938aa97%7C0%7C0%7C638723368552434186%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=jYEEMW%2FUCLR4%2BFMJt0e%2BsVfsOcgl1hkiQjDrTSAtal0%3D&reserved=0>)
  3.  Vadrevu, S. and Nagi, R. "A GPU accelerated algorithm for solving the Multi-dimensional Assignment Problem for a Multi-Target Tracking application," IEEE Transactions on Automation, Science and Engineering, June 2023, Vol. 20(3), pp. 1706 - 1720. [(near-)optimal solution to 25 billion variable NP-hard problem]
  4.  Natu, S., Date, K. and Nagi, R. "GPU-accelerated Lagrangian Heuristic for Multidimensional Assignment Problems with Decomposable Costs," Parallel Computing, Sept. 2020, Vol. 97, pp. 102666.
  5.  Date, K. and Nagi, R. "Level 2 Reformulation Linearization Technique–Based Parallel Algorithms for Solving Large Quadratic Assignment Problems on Graphics Processing Unit Clusters," INFORMS Journal of Computing, Fall 2019, Vol. 31(4), pp. 771-789.
  6.  Date, K. and Nagi, R. "A GPU Accelerated Hungarian Algorithm for the Linear Assignment Problem," Parallel Computing, September 2016, Vol. 57, pp. 52-72. [Transitioned to NVIDIA Rapids]
Graph Algorithms

  1.  Almasri, M., Chang, Y.-H, El Hajj, I., Nagi, R., Xiong, J., and Hwu, W-M. "Parallelizing Maximal Clique Enumeration on GPUs," 32nd International Conference on Parallel Architectures and Compilation Techniques (PACT 2023), October 21–25, 2023, Vienna, Austria.
  2.  Kawtikwar, S., Almasri, M., Hwu, W-M., Nagi, R., and Xiong, J. "BEEP: Balanced Efficient subgraph Enumeration in Parallel," 52nd International Conference on Parallel Processing (ICPP 2023), August 7-10, 2023, Salt Lake City, Utah.
  3.  Kawtikwar, S. and Nagi, R. "Multi-Target Tracking with GPU-Accelerated Data Association Engine," 26th International Conference on Information Fusion, Charleston, SC, June 27-30, 2023.
  4.  Almasri, M., El Hajj, I., Nagi, R., Xiong, J., and Hwu, W-M. "Parallel K-Clique Counting on GPUs," 36th ACM International Conference on Supercomputing (ICS) (ICS'22), June 27 – June 30, 2022, virtual.
  5.  Dodeja, V., Almasri, M., Nagi, R., Xiong, J., and Hwu, W-M. "PARSEC: PARallel Subgraph Enumeration in CUDA," IPDPS 2022, 36th IEEE International Parallel & Distributed Processing Symposium, May 30 – June 3, 2022, Lyon, France.
  6.  AlMasri, M., Vasudeva, N., Nagi, R., Xiong, J., and Hwu, W-M. "HyKernel: A Hybrid Selection of One/Two-Phase Kernels for Triangle Counting on GPUs," High Performance Extreme Computing Conference (HPEC), 2021 IEEE, Waltham, MA, 21-23 September 2021. [DARPA Graph Challenge Student Innovation Award.]
  7.  Hiyadetoglu, M., Mailthody, V.S., Pearson, C., Ebrahimi, E., Xiong, J., Nagi, R., and Hwu, W-M. "Efficient Inference on GPUs for the Sparse Deep Neural Network Graph Challenge 2020," High Performance Extreme Computing Conference (HPEC), 2020 IEEE, Waltham, MA, 24-26 September 2020. [DARPA Graph Challenge Champion!]
  8.  Kim, D., Chen, D., and Nagi, R. "Thanos: High-Performance CPU-GPU Based Balanced Graph Partitioning Using Cross-Decomposition," 25th Asia and South Pacific Design Automation Conference ASP DAC 2020, Beijing, China, 13-16 January 2020.
  9.  Almasri, M., Anjum, O., Pearson, C., Qureshi, Z., Mailthody, V.S., Nagi, R., Xiong, J., and Hwu, W-M. "Update on k-truss Decomposition on GPU," High Performance Extreme Computing Conference (HPEC), 2019 IEEE, Waltham, MA, 24-26 September 2019. [DARPA Graph Challenge Student Innovation Award.]
  10. Pearson, C., Almasri, M., Anjum, O., Qureshi, Z., Mailthody, V.S., Nagi, R., Xiong, J., and Hwu, W-M. Update on triangle counting on GPU. High Performance Extreme Computing Conference (HPEC), 2019 IEEE, Waltham, MA, 24-26 September 2019. [DARPA Graph Challenge Honorable Mention.]
  11. Huang, S., Pearson, C., Nagi, R., Xiong, J., Chen, D., and Hwu, W-M. Accelerating Sparse Deep Neural Networks on FPGAs. High Performance Extreme Computing Conference (HPEC), 2019 IEEE, Waltham, MA, 24-26 September 2019. [DARPA Graph Challenge Honorable Mention.]
  12. Mailthody, V.S., Date, K., Qureshi, Z., Pearson, C., Nagi, R., Xiong, J., and Hwu, W-M. Collaborative (CPU + GPU) algorithms for triangle counting and truss decomposition. High Performance Extreme Computing Conference (HPEC), 2018 IEEE, Waltham, MA, 25-27 September 2018. [DARPA Graph Challenge Finalist.]
  13. Huang, S., El-Hadedy, M., Hao, C., Li, Q., Mailthody, V., Date, K., Xiong, J., Chen, D., Nagi, R., and Hwu, W-M. Triangle counting and truss decomposition using FPGA. High Performance Extreme Computing Conference (HPEC), 2018 IEEE, Waltham, MA, 25-27 September 2018. [DARPA Graph Challenge Student Innovation Award.]
  14. Date, K., Feng, K., Nagi, R., Xiong, J., Kim, N.S., and Hwu, W-M. Collaborative (CPU + GPU) algorithms for triangle counting and truss decomposition on the Minsky architecture. High Performance Extreme Computing Conference (HPEC), 2017 IEEE, Waltham, MA, 12-14 September 2017. [DARPA Graph Challenge Honorable Mention.]

Rakesh
--
Head of Pillar and Professor, Engineering Systems and Design (ESD)
Director, Aviation Studies Institute (ASI)
Singapore University of Technology and Design (SUTD)
8 Somapah Road Singapore 487372
Room 1.702-16; Tel: +65 6499 7221<tel:+6564997221>
rakesh_nagi at sutd.edu.sg<mailto:rakesh_nagi at sutd.edu.sg>
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